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MC74HC132A Quad 2-Input NAND Gate with Schmitt-Trigger Inputs
High-Performance Silicon-Gate CMOS
The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pull-up resistors, they are compatible with LSTTL outputs. The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms.
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14
* * * * * * * *
Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements as Defined by JEDEC Standard No. 7A Chip Complexity: 72 FETs or 18 Equivalent Gates Pb-Free Packages are Available
PDIP-14 N SUFFIX CASE 646 1 14 SOIC-14 D SUFFIX CASE 751A 1
MC74HC132AN AWLYYWWG
HC132AG AWLYWW
14 TSSOP-14 DT SUFFIX CASE 948G HC 132A ALYWG G 1 14 SOEIAJ-14 F SUFFIX CASE 965 1 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) 74HC132A ALYWG
A1 B1 Y1 A2 B2 Y2 GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC B4 A4 Y4 B3 A3 Y3
Figure 1. Pin Assignment
FUNCTION TABLE
Inputs A L L H H B L H L H Output Y H H H L
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
1
December, 2006 - Rev. 12
Publication Order Number: MC74HC132A/D
MC74HC132A
A1
1 3 Y1
B1 A2
2 4 6 Y2
B2 A3
5 Y = AB 9 8 Y3
B3
10
A4 12 11 B4 13 PIN 14 = VCC PIN 7 = GND Y4
Figure 2. Logic Diagram
ORDERING INFORMATION
Device MC74HC132AN MC74HC132ANG MC74HC132AD MC74HC132ADG MC74HC132ADR2 MC74HC132ADR2G MC74HC132ADT MC74HC132ADTR2 MC74HC132ADTR2G MC74HC132AFELG Package PDIP-14 PDIP-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) TSSOP-14* TSSOP-14* TSSOP-14* SOEIAJ-14 (Pb-Free) 2500 / Tape & Reel 2000 / Tape & Reel 2500 / Tape & Reel 96 Units / Rail 55 Units / Rail 25 / Tape & Ammo Box Shipping
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74HC132A
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIK IOK IOUT ICC IGND TSTG TL TJ qJA Positive DC Supply Voltage Digital Input Voltage DC Output Voltage Input Diode Current Output Diode Current DC Output Current, per Pin DC Supply Current, VCC and GND Pins DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance 14-PDIP 14-SOIC 14-TSSOP PDIP SOIC TSSOP Output in 3-State High or Low State Parameter Value *0.5 to )7.0 *0.5 to )7.0 *0.5 to )7.0 *0.5 to VCC )0.5 *20 $20 $25 $75 $75 *65 to )150 260 )150 78 125 170 750 500 450 Level 1 Oxygen Index: 30% - 35% Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) Above VCC and Below GND at 85_C (Note 4) UL 94 V0 @ 0.125 in u2000 u100 u500 $300 V Unit V V V mA mA mA mA mA _C _C _C _C/W
PD
Power Dissipation in Still Air at 85_C
mW
MSL FR VESD
Moisture Sensitivity Flammability Rating ESD Withstand Voltage
ILatch-Up
Latch-Up Performance
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD22-A114-A. 2. Tested to EIA/JESD22-A115-A. 3. Tested to JESD22-C101-A. 4. Tested to EIA/JESD78. 5. For high frequency or heavy load considerations, see Chapter 2the ON Semiconductor High-Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Parameter DC Supply Voltage (Referenced to GND) Min 2.0 0 Max 6.0 Unit V V
III I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I III I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII II IIIII
VIN, VOUTIIIIIIIIIIIIIIIIIIIII DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types Input Rise and Fall Time (Figure 3) VCC *55 - )125 _C ns tr, tf No Limit (Note 6) 6. When VIN X 0.5 VCC, ICC >> quiescent current. 7. Unused inputs may not be left open. All inputs must be tied to a high-logic voltage level or a low-logic input voltage level.
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MC74HC132A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC Symbol VT+max Parameter Maximum Positive-Going Input Threshold Voltage (Figure 5) Minimum Positive-Going Input Threshold Voltage (Figure 5) Test Conditions VOUT = 0.1 V |IOUT| v 20 mA VOUT = 0.1 V |IOUT| v 20 mA V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Guaranteed Limit *55_C to 25_C 1.5 3.15 4.2 1.0 2.3 3.0 0.9 2.0 2.6 0.3 0.9 1.2 v85_C 1.5 3.15 4.2 0.95 2.25 2.95 0.95 2.05 2.65 0.3 0.9 1.2 v125_C 1.5 3.15 4.2 Unit V
II I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I II I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I I I I IIIII I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I II I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I II II I I IIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I II I I II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II IIII III I I IIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II IIIII IIIIIIIIII I I II I I IIIIIIIIIIIIIIIIIIIIIII I I I II IIIIIIIIIII II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I I I I I I II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II IIIIIIIIIIIIIIIIIIIIII I I II I I IIIIIIIIIII I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I I III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I
VT+min 0.95 2.25 2.95 0.95 2.05 2.65 0.3 0.9 1.2 V VT-max Maximum Negative-Going Input Threshold Voltage (Figure 5) Minimum Negative-Going Input Threshold Voltage (Figure 5) Maximum Hysteresis Voltage (Figure 5) Minimum Hysteresis Voltage (Figure 5) VOUT = VCC - 0.1 V |IOUT| v 20 mA VOUT = VCC - 0.1 V |IOUT| v 20 mA V VT-min V VHmax (Note 8) VOUT = 0.1 V or VCC - 0.1 V |IOUT| v 20 mA VOUT = 0.1 V or VCC - 0.1 V |IOUT| v 20 mA VIN v VT-min or VT+max |IOUT| v 20 mA VIN v 1.2 2.25 3.0 0.2 0.4 0.5 1.9 4.4 5.9 1.2 2.25 3.0 0.2 0.4 0.5 1.9 4.4 5.9 1.2 2.25 3.0 0.2 0.4 0.5 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 V VHmin (Note 8) VOH V Minimum High-Level Output Voltage V -VT-min or VT+max |IOUT| v 4.0 mA |IOUT| v 5.2 mA 3.98 5.48 0.1 0.1 0.1 3.84 5.34 0.1 0.1 0.1 VOL Maximum Low-Level Output Voltage VIN VT+max |IOUT| v 20 mA VIN VT+max V |IOUT| v 4.0 mA |IOUT| v 5.2 mA 0.26 0.26 0.33 0.33 IIN Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) VIN = VCC or GND VIN = VCC or GND IOUT = 0 mA $0.1 1.0 $1.0 10 $1.0 40 mA mA ICC 8. VHmin u (VT+min) * (VT-max); VHmax = (VT+max) ) (VT-min). 9. Information on typical parametric values can be found in the ON Semiconductor High-Speed CMOS Data Book (DL129/D).
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MC74HC132A
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
VCC Symbol tPLH, tPHL tTLH, tTHL Cin Parameter Maximum Propagation Delay, Input A or B to Output Y (Figures 3 and 4) Maximum Output Transition Time, Any Output (Figures 3 and 4) Maximum Input Capacitance V 2.0 4.5 6.0 2.0 4.5 6.0 -- Guaranteed Limit *55_C to 25_C 125 25 21 75 15 13 10 v85_C 155 31 26 95 19 16 10 v125_C 190 38 32 110 22 19 10 Unit ns
II I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I III I I I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I
ns pF 10. For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High-Speed CMOS Data Book (DL129/D). Typical @ 25C, VCC = 5.0 V 24
2f
CPD
Power Dissipation Capacitance (per Gate) (Note 11)
pF
11. Used to determine the no-load dynamic power consumption: P D = C PD V CC Semiconductor High-Speed CMOS Data Book (DL129/D).
+ ICC VCC . For load considerations, see the ON
TEST POINT tr INPUT A OR B Y tTHL 90% 50% 10% tPHL 90% 50% 10% tTLH *Includes all probe and jig capacitance tPLH tf VCC GND DEVICE UNDER TEST OUTPUT CL*
Figure 3. Switching Waveforms
Figure 4. Test Circuit
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MC74HC132A
VT, TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) 4
3
VHtyp
2
1
2
3 4 5 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT + typ) - (VT - typ)
6
Figure 5. Typical Input Threshold, VT+, VT- Versus Power Supply Voltage
VH VIN
VCC VT + VT - GND VOH VIN
VH
VCC VT + VT - GND VOH
VOUT VOL VCC
VOUT VOL
(a) A SCHMITT TRIGGER SQUARES UP INPUTS (a) WITH SLOW RISE AND FALL TIMES
VIN
VOUT (b) A SCHMITT TRIGGER OFFERS MAXIMUM NOISE IMMUNITY
Figure 6. Typical Schmitt-Trigger Applications
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MC74HC132A
PACKAGE DIMENSIONS
PDIP-14 CASE 646-06 ISSUE P
14
8
B
1 7
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10 _ 0.38 1.01
A F N -T-
SEATING PLANE
L C
K H G D 14 PL 0.13 (0.005)
M
J M
DIM A B C D F G H J K L M N
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MC74HC132A
PACKAGE DIMENSIONS
SOIC-14 CASE 751A-03 ISSUE H
-A-
14 8
-B-
P 7 PL 0.25 (0.010)
M
B
M
1
7
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
G C R X 45 _ F
DIM A B C D F G J K M P R
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04 1
14X
14X
1.52
0.58
1.27 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC74HC132A
PACKAGE DIMENSIONS
TSSOP-14 CASE 948G-01 ISSUE B
14X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
N
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E K
0.15 (0.006) T U
S
J J1
SECTION N-N -W-
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
SOLDERING FOOTPRINT*
7.06 1
14X
0.36
14X
1.26
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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9
CCC EEE CCC EEE CCC
A -V-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
K1
DIM A B C D F G H J J1 K K1 L M
0.65 PITCH
DIMENSIONS: MILLIMETERS
MC74HC132A
PACKAGE DIMENSIONS
SOEIAJ-14 CASE 965-01 ISSUE A
14
8
LE Q1 E HE M_ L DETAIL P
1
7
Z D e A VIEW P
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 1.42 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.056
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
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MC74HC132A/D

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